Conventionally, as a nonvolatile memory using a resistance value of a variable resistor as storage information, rewriting the storage information by changing the resistance value, and reading out the storage information by detecting the resistance value, there is an MRAM (Magnetic Random Access Memory) (M. Durlam et al., Nonvolatile Ram Based on Magnetic Tunnel Junction Elements, International Solid-State Circuits Conference Digest of Technical Papers, pp. 130-131, Feb. 2000).
FIG. 36(a) is a schematic sectional view of one memory cell constituting such an MRAM and FIG. 36(b) is an equivalent circuit diagram.
The memory cell is constituted in such a manner that a variable resistor 911 and a selection transistor 912 are connected to each other via a metal wire 917 and a contact plug 918. In addition, a bit line 914 is connected to one end of the variable resistor 911.
The variable resistor 911 is constituted by MTJ (Magnetic Tunnel Junction) and is sandwiched by a rewrite word line 913 extended in a direction orthogonal to the bit line 914 and the bit line at the crossing point of the lines.
The selection transistor 912 is constituted by a pair of diffusion regions 920 formed on a semiconductor substrate 919 and a gate electrode. One of the diffusion regions 920 is connected to the variable resistor 911 via the metal wire 917 and the contact plug 918, and the other diffusion region is connected to a source line 915. The gate electrode constitutes a selection word line 916.
A rewriting operation of the MRAM is performed in such a manner that a composite magnetic field generated by current flowing in the bit line 914 and the rewrite word line 913 changes the resistance value of the variable resistor 911. On the other hand, a reading operation is performed in such a manner that the selection transistor 912 is turned on and a current value flowing in the variable resistor 911, that is, the resistance value of the variable resistor 911 is detected.
As described above, a memory cell of the MRAM is constituted by two devices: the variable resistor 911 which is a device having three terminals; and the selection transistor 912 which is a device having three terminals. Consequently, it is limited and difficult to realize further scale-down and increase in capacity of a memory.